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Subelement E6
CIRCUIT COMPONENTS
Section E6C
Digital ICs: families of digital ICs; gates; programmable logic devices
What is the function of hysteresis in a comparator?
  • Correct Answer
    To prevent input noise from causing unstable output signals
  • To allow the comparator to be used with AC input signals
  • To cause the output to continually change states
  • To increase the sensitivity

Put simply, hysteresis means that the voltage needed to turn the circuit on is higher than the voltage below which it will turn off. This creates a "dead band" where it will not change until the input swings further. Just like a thermostat controlling a furnace will not turn off until the temperature rises another degree past the set point.

This improves noise immunity because the magnitude of the noise is very small and cannot push it far enough to turn the output on and off.

Hysteresis is used in ordinary physics too. It comes from the Greek meaning "shortcoming" or "to fall short" (of what's needed to make a change)

Memory Trick: When a person is HYSTERICAL they are usually UNSTABLE,

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Tags: arrl chapter 6 arrl module 6b

What happens when the level of a comparator’s input signal crosses the threshold voltage?
  • The IC input can be damaged
  • Correct Answer
    The comparator changes its output state
  • The reference level appears at the output
  • The feedback loop becomes unstable

A comparator does a "greater-than/less-than" test on two voltages, one of which is often a fixed-voltage reference. When the input signal crosses over the threshold (the fixed reference voltage) the output goes high; when it crosses below the threshold the output goes low.

Thus the the comparator changes its output state.

The responses about damage and latch-up are both faults related to exceeding the supply voltage, not the threshold, and since they are so similar they can't both be right. The response about feedback is incorrect because comparators don't use negative feedback and thus can't oscillate.

Hint: When traveling, you change state when you cross the threshold (or border) into another state.

Memory Aid: “Comparator” appears in both the question and the correct answer choice.

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Tags: arrl chapter 6 arrl module 6b

What is tri-state logic?
  • Correct Answer
    Logic devices with 0, 1, and high-impedance output states
  • Logic devices that utilize ternary math
  • Logic with three output impedances which can be selected to better match the load impedance
  • A counter with eight states

In digital electronics three-state, tri-state, or 3-state logic allows an output port to assume a high impedance state in addition to the 0 and 1 logic levels, effectively removing the output from the circuit.

Ref: https://en.wikipedia.org/wiki/Three-state_logic

I like to think of it as 0, 1 and Null (High Impedance)

In this case "high impedance" pretty much just means "disconnected". A common case where this is used is where you have several digital devices connected to a shared data bus. When devices aren't transmitting data to the bus, the outputs should not be 1 or 0, they should be effectively disconnected from the bus so they don't corrupt data from another device. Since they can't easily be physically disconnected, they're "disconnected" by a transistor(s) that provide high impedance to any current flow. In Verilog, high impedance is denoted with Z so you get 1, 0, and Z where Z pretty much means "logically disconnected".

Hint: Only one answer lists the 3 states.

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Tags: arrl chapter 5 arrl module 5c

Which of the following is an advantage of BiCMOS logic?
  • Its simplicity results in much less expensive devices than standard CMOS
  • It is immune to electrostatic damage
  • Correct Answer
    It has the high input impedance of CMOS and the low output impedance of bipolar transistors
  • All these choices are correct

Just remember BiCMOS combines the qualities of Bipolar transistors and CMOS!

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Tags: arrl chapter 5 arrl module 5e

Which of the following digital logic families has the lowest power consumption?
  • Schottky TTL
  • ECL
  • NMOS
  • Correct Answer
    CMOS
This question does not yet have an explanation! Register to add one

Tags: none

Why do CMOS digital integrated circuits have high immunity to noise on the input signal or power supply?
  • Large bypass capacitance is inherent
  • The input switching threshold is about twice the power supply voltage
  • Correct Answer
    The input switching threshold is about half the power supply voltage
  • Bandwidth is very limited

CMOS (Complementary metal-oxide-semiconductor) is arguably the most common type of digital IC. An advantage of CMOS logic devices over TTL (Transistor-Transistor Logic) devices is that they have lower power consumption. (E6C05) CMOS digital integrated circuits also have high immunity to noise on the input signal or power supply because the input switching threshold is about one-half the power supply voltage. (E6C06)

http://www.kb6nu.com/extra-class-question-of-the-day-digital-integrated-circuits/

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Tags: arrl chapter 5 arrl module 5e

What best describes a pull-up or pull-down resistor?
  • A resistor in a keying circuit used to reduce key clicks
  • Correct Answer
    A resistor connected to the positive or negative supply used to establish a voltage when an input or output is an open circuit
  • A resistor that ensures that an oscillator frequency does not drift
  • A resistor connected to an op-amp output that prevents signals from exceeding the power supply voltage

Digital inputs "float" unless they are driven by something. If not addressed, the sensitive input circuitry might be in an indeterminate state or even oscillate. To keep this from happening, a weak resistor "pulls up" or "pulls down" the input to one of the supply rails when nothing is connected, giving it a definitive logic high or low state. Once a driver is connected to the circuit its stronger output takes over.

Also, on an overloaded output stage the levels may not rise or fall to the proper voltage required, so pull-up or pull-down resistors assist the output stage.

HINT: The terms 'pull-up' and 'pull-down' could be thought to imply 'negative' and 'positive.' The correct answer is the only one that includes those terms.

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Tags: arrl chapter 5

In Figure E6-3, which is the schematic symbol for a NAND gate?
  • 1
  • Correct Answer
    2
  • 3
  • 4

A list of symbols can be found here: https://en.wikipedia.org/wiki/Electronic_symbol

The NAND looks like a mammary glAND


Look at the left side of the symbol (the Input side). AND family has a straight line like the letter A. OR family has a curved lines like the letter O.

The little o at the right side (output) means nOt and inverts the value. Since Not starts with an N it will substitute for NAND and NOR gates.


Since it's pretty easy to remember that the little O is a NOT, the main thing you need to remember here is the difference in shape between an AND and OR gate.


It can also be useful to just remember that 6 in the figure is not the answer to any question

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What is used to design the configuration of a field-programmable gate array (FPGA)?
  • Karnaugh maps
  • Correct Answer
    Hardware description language (HDL)
  • An auto-router
  • Machine and assembly language

Karnaugh maps are used to simplify real-world logic requirements, not for FPGAs configurations.

Hardware description language is a language used to describe hardware, FPGA is a kind of hardware, so that's correct answer. See more here: Hardware description language

Auto-router is used to place wires automatically in PCB design, no conncection with FPGAs.

Machine and assembly language are used to conduct low-level computer programming, also not related to FPGA.

Hint: There’a an acronym (FPGA) in the question, and the correct answer is the only choice that also contains an acronym (HDL).

Memory Hint: gate is a kind of hardware, to configurate hardware, you need a hardware language. There's only one choice mentioning hardware and language, and that's the correct answer.

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Tags: none

In Figure E6-3, which is the schematic symbol for a NOR gate?
  • 1
  • 2
  • 3
  • Correct Answer
    4

1 - AND

2 - NAND

3 - OR

4 - NOR

5 - NOT

Item six is not a real symbol.

Electronic Symbol Reference: https://en.wikipedia.org/wiki/Logic_gate#Symbols

The main thing to remember is the difference in shape between an AND and OR gate, and the fact that the little circle (O) means NOT.

Tip to remember: 4 is NOR 5 is NOT

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In Figure E6-3, which is the schematic symbol for the NOT operation (inversion)?
  • 2
  • 4
  • Correct Answer
    5
  • 6

1 - AND gate
2 - NAND gate
3 - OR gate
4 - NOR gate
5 - NOT gate
6 - Figure 6 is most similar to an Amplifier

The NOT gate is the only one that has one input and one output. The NOT gate inverses the input.

Study hint: The little dot is an inverter. The NOT triangle doesn't do anything by itself, but the dot inverts it.

One more memory tool: This is the only symbol on here that resembles a knot.

The NOT gate looks kind of like a diode symbol, but it is "NOT" a diode.

See https://en.wikipedia.org/wiki/Logic_gate#Symbols

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