When comparing TTL and CMOS logic families, which of the following is true:
CMOS logic requires a supply voltage of 5 volts ±20%, whereas TTL logic requires 5 volts ±5%.
Unused inputs should be tied high or low as necessary especially in the CMOS family.
At higher operating frequencies, CMOS circuits consume almost as much power as TTL circuits.
When a CMOS input is held low, it sources current into whatever it drives.